With the development of electric vehicle technology and government policy encouragement and support, electric vehicles (hybrid + pure electric) are growing at a rate of more than 50% per year. Batteries and battery management systems are the core components of electric vehicles, and their market demand Also achieved corresponding rapid growth. This article will analyze the memory requirements of the battery management system. The battery management system (Battery Management System, or BMS) mainly implements three core functions: prediction and calculation of battery charge and discharge status (i.e., SOC), balancing management of single cells, and battery Health status logging and diagnostics. The functional block diagram is as follows: In the entire battery management system, the prediction and calculation of the battery state of charge (i.e. SOC) is its most important function. Only with accurate prediction/calculation of the battery charge/discharge state can effective balance management be carried out. . Therefore, the SOC accuracy requirement is that the higher the better. In order to improve the accuracy of SOC, in addition to collecting the voltage and current parameters of the battery, it is also necessary to provide various parameters such as impedance, temperature, ambient temperature, charge and discharge time, etc. The inherent parameters of the battery will be built into a software model through mathematical modeling, while the dynamic parameters will collect data in real time through the data acquisition card, and transmit the data to the MCU unit for storage in real time, and then the MCU will perform algorithm calculations on the extracted data, thereby Get an accurate battery state of charge. Therefore, the SOC function will store the models of different batteries into the memory. The memory must have low power consumption, fast reading and writing, a simple interface, and a data retention time of 20 years; the SOC function requires the acquisition card to continuously store the collected data in real time. The battery voltage/current data is stored in the memory. If an MCU unit is connected to the collection data of 10 single batteries, the collection data card will generally use the 1MB isoSPI bus for communication. That is, for the memory of the MCU unit, the interface speed requirement is high and almost A data write operation must be performed every second; and the battery life requirement is at least 10 years. If a car runs for 8 hours, then the number of data write operations in the MCU unit's memory during the battery pack life cycle is 105 million times. In summary, it can be seen from the above analysis that the SOC function in BMS is very critical, so its performance and reliability for memory are also very high: it must be non-volatile memory, the number of erases and writes must be at least more than 110 million times, and the interface rate must be greater than 8MHz , with low power consumption and the ability to reliably store data for 20 years, it needs to comply with AECQ-100. In the future, it needs to pass functional safety certification and have at least the ASILB level. The current mainstream non-volatile memories include EEPROM, Flash and F-RAM. The EEPROM interface has an SPI interface, and the rate can reach 10Mhz, but each write has a 5ms write waiting time, the number of erases and writes is 1 million times, the power consumption is medium, and there are automotive-grade devices, but there is no functional safety at present. Certification and data retention capabilities can also be achieved for 20 years. The read and write speed of Flash is slow. Each write operation must be erased, so it takes at least a few hundred milliseconds to complete a write operation. The number of erases and writes can only be supported 100,000 times, which is far less than 110 million times. According to the requirements, the data retention capacity is between 10 and 20 years. F-RAM uses a special ferroelectric material as a storage medium. It has high reliability, data retention time of 100 years, completely random and high read and write efficiency without waiting for writing. The SPI interface rate can support up to 50Mhz or 108MHz QSPI. , and has very low power consumption; due to its special ferroelectric material, this type of memory can be erased and written up to 10 billion times. As shown below:

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